Citation:

M.Vinoka, Dr.S.Durairaj, 2023. Effective Error Detection in VLSI Circuits Using Comparators ESP Journal of Engineering & Technology Advancements  3(3): 1-7.

Abstract:

This study focuses on providing simulation results and analysis of a fault-tolerant voter circuit, with a specific emphasis on the Triple Modular Redundant (TMR) system. TMR systems enhance the robustness of the voter circuit by introducing redundancy at the logic level. The proposed technique aims to minimize the area cost while ensuring multiple fault detection capability. To achieve this, a novel voter circuit has been developed and implemented using Verilog HDL. The circuit's performance has been thoroughly evaluated through extensive simulations using Xilinx 12.1 software. By improving the robustness of the voter circuit in a TMR system, this work contributes to enhancing the overall reliability and fault tolerance of nanoelectronic systems. The proposed voter circuit designed with minimum area cost considerations, offers efficient multiple fault detection capabilities. The use of Verilog HDL and Xilinx 12.1 simulations provides a comprehensive evaluation of the circuit's performance, ensuring its feasibility and effectiveness in practical implementations. Overall, this research work sheds light on the importance of hardware redundancy in mitigating the higher defect rates observed in nanoelectronics. By focusing on the development and evaluation of a robust voter circuit within a TMR system, this study paves the way for more reliable and fault-tolerant nanoelectronic systems, enabling them to operate seamlessly even in the presence of inherent defects and challenges.

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Keywords:

VLSI Circuit, Comparators, TMR System.